The present invention relates to a method of operating a crossbar switch having a control logic, an output port scheduler, n input ports and m output ports, wherein information packets are routed from said n input ports to said m output ports, and wherein said output port scheduler controls the sequence of packets output at said output ports.
The present invention further relates to a crossbar switch having a control logic, an output port scheduler, n input ports and m output ports, wherein information packets are routed from said n input ports to said m output ports, and wherein said output port scheduler controls the sequence of packets output at said output ports.
The present invention also relates to a networking system.
Crossbar switches are used in high performance computer systems and nodes of electronic networks such as communication networks to route an information packet arriving at an arbitrary input port to a specified output port.
A crossbar switch comprises n input crossbars each of which is assigned to one of said n input ports and m output crossbars each of which is assigned to one of said m output ports. An intersection of an input crossbar with an output crossbar is called crosspoint.
The routing of an information packet within a crossbar switch is controlled by a control logic that keeps track of incoming information packets. The control logic analyses header data of said information packets and stores address information related to said information packets in a buffer system whose buffer elements are most often assigned to a specific crosspoint. The payload of said information packets is stored in a buffer system, too.
Storing said address information and the corresponding payload avoids packet losses e.g. in case of multiple packets requiring to be routed to the same output port.
Advanced crossbar switches can handle information packages of different priorities. This feature ensures that packets with higher priority are routed to a specific output port first, even if packets with lower priority requiring the same output port have arrived at the crossbar switch earlier.
A further advanced feature, which is known as link paralleling, comprises temporarily building a logical input/output port out of several physical input/output ports. The bandwidth of such a logical port is increased by a factor corresponding to the number of physical ports used for link paralleling.
An output port scheduler controls the packet flow at the output ports of the crossbar switch, e.g. by choosing which packet to output next at a specific port. In most cases, there is more than one packet temporarily buffered within one of the buffers associated to an output crossbar. In this case, the output port scheduler has to determine the sequence in which said packets are output.
Important criteria for determining the packet sequence at an output port are fairness, maintaining a certain packet sequence in which distinct packets have arrived at an input port, and avoiding starvation.
Many state-of-the-art crossbar switches use output arbitration schemes based on linked lists, which is a very complex solution with various disadvantages. controlling the packet sequence at an output port using a linked list approach does not guarantee lowest possible latency because of the requirement of traversing linked lists for some operations.